mirror of
https://github.com/exoticorn/curlywas.git
synced 2026-01-20 11:46:43 +01:00
implement unsigned operators
This commit is contained in:
34
src/emit.rs
34
src/emit.rs
@@ -413,43 +413,58 @@ fn emit_expression<'a>(ctx: &mut FunctionContext<'a>, expr: &'a ast::Expression)
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(I32, Sub) => Instruction::I32Sub,
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(I32, Mul) => Instruction::I32Mul,
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(I32, Div) => Instruction::I32DivS,
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(I32, DivU) => Instruction::I32DivU,
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(I32, Rem) => Instruction::I32RemS,
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(I32, RemU) => Instruction::I32RemU,
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(I32, And) => Instruction::I32And,
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(I32, Or) => Instruction::I32Or,
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(I32, Xor) => Instruction::I32Xor,
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(I32, Eq) => Instruction::I32Eq,
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(I32, Ne) => Instruction::I32Neq,
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(I32, Lt) => Instruction::I32LtS,
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(I32, LtU) => Instruction::I32LtU,
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(I32, Le) => Instruction::I32LeS,
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(I32, LeU) => Instruction::I32LeU,
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(I32, Gt) => Instruction::I32GtS,
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(I32, GtU) => Instruction::I32GtU,
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(I32, Ge) => Instruction::I32GeS,
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(I32, Lsl) => Instruction::I32Shl,
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(I32, Lsr) => Instruction::I32ShrU,
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(I32, Asr) => Instruction::I32ShrS,
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(I32, GeU) => Instruction::I32GeU,
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(I32, Shl) => Instruction::I32Shl,
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(I32, ShrU) => Instruction::I32ShrU,
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(I32, ShrS) => Instruction::I32ShrS,
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(I64, Add) => Instruction::I64Add,
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(I64, Sub) => Instruction::I64Sub,
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(I64, Mul) => Instruction::I64Mul,
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(I64, Div) => Instruction::I64DivS,
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(I64, DivU) => Instruction::I64DivU,
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(I64, Rem) => Instruction::I64RemS,
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(I64, RemU) => Instruction::I64RemU,
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(I64, And) => Instruction::I64And,
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(I64, Or) => Instruction::I64Or,
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(I64, Xor) => Instruction::I64Xor,
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(I64, Eq) => Instruction::I64Eq,
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(I64, Ne) => Instruction::I64Neq,
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(I64, Lt) => Instruction::I64LtS,
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(I64, LtU) => Instruction::I64LtU,
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(I64, Le) => Instruction::I64LeS,
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(I64, LeU) => Instruction::I64LeU,
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(I64, Gt) => Instruction::I64GtS,
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(I64, GtU) => Instruction::I64GtU,
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(I64, Ge) => Instruction::I64GeS,
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(I64, Lsl) => Instruction::I64Shl,
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(I64, Lsr) => Instruction::I64ShrU,
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(I64, Asr) => Instruction::I64ShrS,
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(I64, GeU) => Instruction::I64GeU,
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(I64, Shl) => Instruction::I64Shl,
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(I64, ShrU) => Instruction::I64ShrU,
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(I64, ShrS) => Instruction::I64ShrS,
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(F32, Add) => Instruction::F32Add,
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(F32, Sub) => Instruction::F32Sub,
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(F32, Mul) => Instruction::F32Mul,
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(F32, Div) => Instruction::F32Div,
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(F32, Rem | And | Or | Xor | Lsl | Lsr | Asr) => unreachable!(),
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(
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F32,
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DivU | Rem | RemU | And | Or | Xor | Shl | ShrU | ShrS | LtU | LeU | GtU | GeU,
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) => unreachable!(),
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(F32, Eq) => Instruction::F32Eq,
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(F32, Ne) => Instruction::F32Neq,
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(F32, Lt) => Instruction::F32Lt,
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@@ -461,7 +476,10 @@ fn emit_expression<'a>(ctx: &mut FunctionContext<'a>, expr: &'a ast::Expression)
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(F64, Sub) => Instruction::F64Sub,
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(F64, Mul) => Instruction::F64Mul,
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(F64, Div) => Instruction::F64Div,
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(F64, Rem | And | Or | Xor | Lsl | Lsr | Asr) => unreachable!(),
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(
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F64,
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DivU | Rem | RemU | And | Or | Xor | Shl | ShrU | ShrS | LtU | LeU | GtU | GeU,
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) => unreachable!(),
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(F64, Eq) => Instruction::F64Eq,
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(F64, Ne) => Instruction::F64Neq,
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(F64, Lt) => Instruction::F64Lt,
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