4 Commits

Author SHA1 Message Date
luchak
2a2bb547d7 Merge 1d89ef8613 into 8913fdaf6b 2025-01-27 21:18:05 -08:00
luchak
1d89ef8613 Support v128.const 2023-02-22 21:21:34 -08:00
luchak
c7be8be2c4 Remove dependency on curlywas SIMD fork 2023-02-13 18:54:02 -08:00
luchak
d9f9500b76 Add SIMD opcode support to uw8-tool 2023-02-13 18:48:19 -08:00

View File

@@ -143,6 +143,7 @@ fn to_val_type(type_: &wasmparser::ValType) -> Result<ValType> {
I64 => ValType::I64, I64 => ValType::I64,
F32 => ValType::F32, F32 => ValType::F32,
F64 => ValType::F64, F64 => ValType::F64,
V128 => ValType::V128,
_ => bail!("Type {:?} isn't a value type", type_), _ => bail!("Type {:?} isn't a value type", type_),
}) })
} }
@@ -972,6 +973,244 @@ fn remap_function(
De::I64TruncSatF64U => En::I64TruncSatF64U, De::I64TruncSatF64U => En::I64TruncSatF64U,
De::MemoryCopy { src_mem, dst_mem } => En::MemoryCopy { src_mem, dst_mem }, De::MemoryCopy { src_mem, dst_mem } => En::MemoryCopy { src_mem, dst_mem },
De::MemoryFill { mem } => En::MemoryFill(mem), De::MemoryFill { mem } => En::MemoryFill(mem),
De::V128Const { value } => En::V128Const(value.i128()),
De::V128Load { memarg } => En::V128Load(mem(memarg)),
De::V128Store { memarg } => En::V128Store(mem(memarg)),
De::V128Load8x8S { memarg } => En::V128Load8x8S(mem(memarg)),
De::V128Load8x8U { memarg } => En::V128Load8x8U(mem(memarg)),
De::V128Load16x4S { memarg } => En::V128Load16x4S(mem(memarg)),
De::V128Load16x4U { memarg } => En::V128Load16x4U(mem(memarg)),
De::V128Load32x2S { memarg } => En::V128Load32x2S(mem(memarg)),
De::V128Load32x2U { memarg } => En::V128Load32x2U(mem(memarg)),
De::V128Load8Splat { memarg } => En::V128Load8Splat(mem(memarg)),
De::V128Load16Splat { memarg } => En::V128Load16Splat(mem(memarg)),
De::V128Load32Splat { memarg } => En::V128Load32Splat(mem(memarg)),
De::V128Load64Splat { memarg } => En::V128Load64Splat(mem(memarg)),
De::V128Load32Zero { memarg } => En::V128Load32Zero(mem(memarg)),
De::V128Load64Zero { memarg } => En::V128Load64Zero(mem(memarg)),
De::V128Load8Lane { memarg, lane } => En::V128Load8Lane { memarg: mem(memarg), lane },
De::V128Load16Lane { memarg, lane } => En::V128Load16Lane { memarg: mem(memarg), lane },
De::V128Load32Lane { memarg, lane } => En::V128Load32Lane { memarg: mem(memarg), lane },
De::V128Load64Lane { memarg, lane } => En::V128Load64Lane { memarg: mem(memarg), lane },
De::V128Store8Lane { memarg, lane } => En::V128Store8Lane { memarg: mem(memarg), lane },
De::V128Store16Lane { memarg, lane } => En::V128Store16Lane { memarg: mem(memarg), lane },
De::V128Store32Lane { memarg, lane } => En::V128Store32Lane { memarg: mem(memarg), lane },
De::V128Store64Lane { memarg, lane } => En::V128Store64Lane { memarg: mem(memarg), lane },
De::I8x16ExtractLaneS { lane } => En::I8x16ExtractLaneS(lane),
De::I8x16ExtractLaneU { lane } => En::I8x16ExtractLaneU(lane),
De::I8x16ReplaceLane { lane } => En::I8x16ReplaceLane(lane),
De::I16x8ExtractLaneS { lane } => En::I16x8ExtractLaneS(lane),
De::I16x8ExtractLaneU { lane } => En::I16x8ExtractLaneU(lane),
De::I16x8ReplaceLane { lane } => En::I16x8ReplaceLane(lane),
De::I32x4ExtractLane { lane } => En::I32x4ExtractLane(lane),
De::I32x4ReplaceLane { lane } => En::I32x4ReplaceLane(lane),
De::I64x2ExtractLane { lane } => En::I64x2ExtractLane(lane),
De::I64x2ReplaceLane { lane } => En::I64x2ReplaceLane(lane),
De::F32x4ExtractLane { lane } => En::F32x4ExtractLane(lane),
De::F32x4ReplaceLane { lane } => En::F32x4ReplaceLane(lane),
De::F64x2ExtractLane { lane } => En::F64x2ExtractLane(lane),
De::F64x2ReplaceLane { lane } => En::F64x2ReplaceLane(lane),
De::I8x16Splat => En::I8x16Splat,
De::I16x8Splat => En::I16x8Splat,
De::I32x4Splat => En::I32x4Splat,
De::I64x2Splat => En::I64x2Splat,
De::F32x4Splat => En::F32x4Splat,
De::F64x2Splat => En::F64x2Splat,
De::I8x16Swizzle => En::I8x16Swizzle,
De::I8x16Add => En::I8x16Add,
De::I16x8Add => En::I16x8Add,
De::I32x4Add => En::I32x4Add,
De::I64x2Add => En::I64x2Add,
De::F32x4Add => En::F32x4Add,
De::F64x2Add => En::F64x2Add,
De::I8x16Sub => En::I8x16Sub,
De::I16x8Sub => En::I16x8Sub,
De::I32x4Sub => En::I32x4Sub,
De::I64x2Sub => En::I64x2Sub,
De::F32x4Sub => En::F32x4Sub,
De::F64x2Sub => En::F64x2Sub,
De::I16x8Mul => En::I16x8Mul,
De::I32x4Mul => En::I32x4Mul,
De::I64x2Mul => En::I64x2Mul,
De::F32x4Mul => En::F32x4Mul,
De::F64x2Mul => En::F64x2Mul,
De::I32x4DotI16x8S => En::I32x4DotI16x8S,
De::I8x16Neg => En::I8x16Neg,
De::I16x8Neg => En::I16x8Neg,
De::I32x4Neg => En::I32x4Neg,
De::I64x2Neg => En::I64x2Neg,
De::F32x4Neg => En::F32x4Neg,
De::F64x2Neg => En::F64x2Neg,
De::I16x8ExtMulLowI8x16S => En::I16x8ExtMulLowI8x16S,
De::I16x8ExtMulHighI8x16S => En::I16x8ExtMulHighI8x16S,
De::I16x8ExtMulLowI8x16U => En::I16x8ExtMulLowI8x16U,
De::I16x8ExtMulHighI8x16U => En::I16x8ExtMulHighI8x16U,
De::I32x4ExtMulLowI16x8S => En::I32x4ExtMulLowI16x8S,
De::I32x4ExtMulHighI16x8S => En::I32x4ExtMulHighI16x8S,
De::I32x4ExtMulLowI16x8U => En::I32x4ExtMulLowI16x8U,
De::I32x4ExtMulHighI16x8U => En::I32x4ExtMulHighI16x8U,
De::I64x2ExtMulLowI32x4S => En::I64x2ExtMulLowI32x4S,
De::I64x2ExtMulHighI32x4S => En::I64x2ExtMulHighI32x4S,
De::I64x2ExtMulLowI32x4U => En::I64x2ExtMulLowI32x4U,
De::I64x2ExtMulHighI32x4U => En::I64x2ExtMulHighI32x4U,
De::I16x8ExtAddPairwiseI8x16S => En::I16x8ExtAddPairwiseI8x16S,
De::I16x8ExtAddPairwiseI8x16U => En::I16x8ExtAddPairwiseI8x16U,
De::I32x4ExtAddPairwiseI16x8S => En::I32x4ExtAddPairwiseI16x8S,
De::I32x4ExtAddPairwiseI16x8U => En::I32x4ExtAddPairwiseI16x8U,
De::I8x16AddSatS => En::I8x16AddSatS,
De::I8x16AddSatU => En::I8x16AddSatU,
De::I16x8AddSatS => En::I16x8AddSatS,
De::I16x8AddSatU => En::I16x8AddSatU,
De::I8x16SubSatS => En::I8x16SubSatS,
De::I8x16SubSatU => En::I8x16SubSatU,
De::I16x8SubSatS => En::I16x8SubSatS,
De::I16x8SubSatU => En::I16x8SubSatU,
De::I16x8Q15MulrSatS => En::I16x8Q15MulrSatS,
De::I8x16MinS => En::I8x16MinS,
De::I8x16MinU => En::I8x16MinU,
De::I16x8MinS => En::I16x8MinS,
De::I16x8MinU => En::I16x8MinU,
De::I32x4MinS => En::I32x4MinS,
De::I32x4MinU => En::I32x4MinU,
De::F32x4Min => En::F32x4Min,
De::F64x2Min => En::F64x2Min,
De::F32x4PMin => En::F32x4PMin,
De::F64x2PMin => En::F64x2PMin,
De::I8x16MaxS => En::I8x16MaxS,
De::I8x16MaxU => En::I8x16MaxU,
De::I16x8MaxS => En::I16x8MaxS,
De::I16x8MaxU => En::I16x8MaxU,
De::I32x4MaxS => En::I32x4MaxS,
De::I32x4MaxU => En::I32x4MaxU,
De::F32x4Max => En::F32x4Max,
De::F64x2Max => En::F64x2Max,
De::F32x4PMax => En::F32x4PMax,
De::F64x2PMax => En::F64x2PMax,
De::I8x16AvgrU => En::I8x16AvgrU,
De::I16x8AvgrU => En::I16x8AvgrU,
De::I8x16Abs => En::I8x16Abs,
De::I16x8Abs => En::I16x8Abs,
De::I32x4Abs => En::I32x4Abs,
De::I64x2Abs => En::I64x2Abs,
De::F32x4Abs => En::F32x4Abs,
De::F64x2Abs => En::F64x2Abs,
De::I8x16Shl => En::I8x16Shl,
De::I16x8Shl => En::I16x8Shl,
De::I32x4Shl => En::I32x4Shl,
De::I64x2Shl => En::I64x2Shl,
De::I8x16ShrS => En::I8x16ShrS,
De::I8x16ShrU => En::I8x16ShrU,
De::I16x8ShrS => En::I16x8ShrS,
De::I16x8ShrU => En::I16x8ShrU,
De::I32x4ShrS => En::I32x4ShrS,
De::I32x4ShrU => En::I32x4ShrU,
De::I64x2ShrS => En::I64x2ShrS,
De::I64x2ShrU => En::I64x2ShrU,
De::V128And => En::V128And,
De::V128Or => En::V128Or,
De::V128Xor => En::V128Xor,
De::V128Not => En::V128Not,
De::V128AndNot => En::V128AndNot,
De::V128Bitselect => En::V128Bitselect,
De::I8x16Popcnt => En::I8x16Popcnt,
De::V128AnyTrue => En::V128AnyTrue,
De::I8x16AllTrue => En::I8x16AllTrue,
De::I16x8AllTrue => En::I16x8AllTrue,
De::I32x4AllTrue => En::I32x4AllTrue,
De::I64x2AllTrue => En::I64x2AllTrue,
De::I8x16Bitmask => En::I8x16Bitmask,
De::I16x8Bitmask => En::I16x8Bitmask,
De::I32x4Bitmask => En::I32x4Bitmask,
De::I64x2Bitmask => En::I64x2Bitmask,
De::I8x16Eq => En::I8x16Eq,
De::I16x8Eq => En::I16x8Eq,
De::I32x4Eq => En::I32x4Eq,
De::I64x2Eq => En::I64x2Eq,
De::F32x4Eq => En::F32x4Eq,
De::F64x2Eq => En::F64x2Eq,
De::I8x16Ne => En::I8x16Ne,
De::I16x8Ne => En::I16x8Ne,
De::I32x4Ne => En::I32x4Ne,
De::I64x2Ne => En::I64x2Ne,
De::F32x4Ne => En::F32x4Ne,
De::F64x2Ne => En::F64x2Ne,
De::I8x16LtS => En::I8x16LtS,
De::I8x16LtU => En::I8x16LtU,
De::I16x8LtS => En::I16x8LtS,
De::I16x8LtU => En::I16x8LtU,
De::I32x4LtS => En::I32x4LtS,
De::I32x4LtU => En::I32x4LtU,
De::F32x4Lt => En::F32x4Lt,
De::F64x2Lt => En::F64x2Lt,
De::I8x16LeS => En::I8x16LeS,
De::I8x16LeU => En::I8x16LeU,
De::I16x8LeS => En::I16x8LeS,
De::I16x8LeU => En::I16x8LeU,
De::I32x4LeS => En::I32x4LeS,
De::I32x4LeU => En::I32x4LeU,
De::F32x4Le => En::F32x4Le,
De::F64x2Le => En::F64x2Le,
De::I8x16GtS => En::I8x16GtS,
De::I8x16GtU => En::I8x16GtU,
De::I16x8GtS => En::I16x8GtS,
De::I16x8GtU => En::I16x8GtU,
De::I32x4GtS => En::I32x4GtS,
De::I32x4GtU => En::I32x4GtU,
De::F32x4Gt => En::F32x4Gt,
De::F64x2Gt => En::F64x2Gt,
De::I8x16GeS => En::I8x16GeS,
De::I8x16GeU => En::I8x16GeU,
De::I16x8GeS => En::I16x8GeS,
De::I16x8GeU => En::I16x8GeU,
De::I32x4GeS => En::I32x4GeS,
De::I32x4GeU => En::I32x4GeU,
De::F32x4Ge => En::F32x4Ge,
De::F64x2Ge => En::F64x2Ge,
De::F32x4Div => En::F32x4Div,
De::F64x2Div => En::F64x2Div,
De::F32x4Sqrt => En::F32x4Sqrt,
De::F64x2Sqrt => En::F64x2Sqrt,
De::F32x4Ceil => En::F32x4Ceil,
De::F64x2Ceil => En::F64x2Ceil,
De::F32x4Floor => En::F32x4Floor,
De::F64x2Floor => En::F64x2Floor,
De::F32x4Trunc => En::F32x4Trunc,
De::F64x2Trunc => En::F64x2Trunc,
De::F32x4Nearest => En::F32x4Nearest,
De::F64x2Nearest => En::F64x2Nearest,
De::F32x4ConvertI32x4S => En::F32x4ConvertI32x4S,
De::F32x4ConvertI32x4U => En::F32x4ConvertI32x4U,
De::F64x2ConvertLowI32x4S => En::F64x2ConvertLowI32x4S,
De::F64x2ConvertLowI32x4U => En::F64x2ConvertLowI32x4U,
De::I32x4TruncSatF32x4S => En::I32x4TruncSatF32x4S,
De::I32x4TruncSatF32x4U => En::I32x4TruncSatF32x4U,
De::I32x4TruncSatF64x2SZero => En::I32x4TruncSatF64x2SZero,
De::I32x4TruncSatF64x2UZero => En::I32x4TruncSatF64x2UZero,
De::F32x4DemoteF64x2Zero => En::F32x4DemoteF64x2Zero,
De::F64x2PromoteLowF32x4 => En::F64x2PromoteLowF32x4,
De::I8x16NarrowI16x8S => En::I8x16NarrowI16x8S,
De::I8x16NarrowI16x8U => En::I8x16NarrowI16x8U,
De::I16x8NarrowI32x4S => En::I16x8NarrowI32x4S,
De::I16x8NarrowI32x4U => En::I16x8NarrowI32x4U,
De::I16x8ExtendLowI8x16S => En::I16x8ExtendLowI8x16S,
De::I16x8ExtendHighI8x16S => En::I16x8ExtendHighI8x16S,
De::I16x8ExtendLowI8x16U => En::I16x8ExtendLowI8x16U,
De::I16x8ExtendHighI8x16U => En::I16x8ExtendHighI8x16U,
De::I32x4ExtendLowI16x8S => En::I32x4ExtendLowI16x8S,
De::I32x4ExtendHighI16x8S => En::I32x4ExtendHighI16x8S,
De::I32x4ExtendLowI16x8U => En::I32x4ExtendLowI16x8U,
De::I32x4ExtendHighI16x8U => En::I32x4ExtendHighI16x8U,
De::I64x2ExtendLowI32x4S => En::I64x2ExtendLowI32x4S,
De::I64x2ExtendHighI32x4S => En::I64x2ExtendHighI32x4S,
De::I64x2ExtendLowI32x4U => En::I64x2ExtendLowI32x4U,
De::I64x2ExtendHighI32x4U => En::I64x2ExtendHighI32x4U,
De::I8x16Shuffle { lanes } => En::I8x16Shuffle(lanes),
other => bail!("Unsupported instruction {:?}", other), other => bail!("Unsupported instruction {:?}", other),
}); });
} }